MTD20P06HDL Datasheet, PDF (1/8 Pages) Motorola, Inc – TMOS POWER FET LOGIC LEVEL 15 AMPERES 60 VOLTS RDS(on) = 175 MOHM

MTD20P06HDL
Preferred Device
Power MOSFET
20 Amps, 60 Volts, Logic
Level
P−Channel DPAK
This Power MOSFET is designed to withstand high energy in the
avalanche and commutation modes. The energy efficient design also
offers a drain−to−source diode with a fast recovery time. Designed for
low−voltage, high−speed switching applications in power supplies,
converters and PWM motor controls, and other inductive loads. The
avalanche energy capability is specified to eliminate the guesswork in
designs where inductive loads are switched, and to offer additional
safety margin against unexpected voltage transients.
Features
• Ultra Low R_DS(on), High−Cell Density, HDTMOS
• Diode is Characterized for Use in Bridge Circuits
• I_DSS and V_DS(on) Specified at Elevated Temperature
• Avalanche Energy Specified
• Pb−Free Package is Available
MAXIMUM RATINGS (T_C = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−Source Voltage
Drain−Gate Voltage (R_GS = 1.0 MW)
Gate−Source Voltage
− Continuous
− Non−Repetitive (t_pv10 ms)
Drain Current
− Continuous
− Continuous @ 100°C
− Single Pulse (t_pv10 ms)
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ T_C = 25°C (Note 2)
Operating and Storage Temperature Range
V_DSS
V_DGR
V_GS
V_GSM
I_D
I_D
I_DM
P_D
T_J, T_stg
60
Vdc
60
Vdc
"15 Vdc
"20 Vpk
15
Adc
9.0
45
Apk
72
W
0.58 W/°C
1.75
W
−55 to °C
150
Single Pulse Drain−to−Source Avalanche
Energy − Starting T_J = 25°C
(V_DD = 25 Vdc, V_GS = 5.0 Vdc,
I_L = 15 Apk, L = 2.7 mH, R_G = 25 W)
E_AS
300
mJ
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
R_qJC
R_qJA
R_qJA
°C/W
1.73
100
71.4
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
T_L
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using the minimum recommended
pad size.
2. When surface mounted to an FR4 board using 0.5 sq. inch pad size.
© Semiconductor Components Industries, LLC, 2006
1
June, 2006 − Rev. 6
http://onsemi.com
20 AMPERES, 60 VOLTS
R_DS(on) = 175 mW
P−Channel
D
G
S
MARKING DIAGRAM & PIN ASSIGNMENTS
4
Gate 1
YWW
12
3
DPAK
CASE 369C
Drain 2
20P
06HLG
Source 3
(Surface Mount)
STYLE 2
4
Drain
20P06HL
Y
WW
G
= Device Code
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
Device
Package Shipping^†
MTD20P06HDL
DPAK
75 Units/Rail
MTD20P06HDLT4 DPAK 2500 Tape & Reel
MTD20P06HDLT4G DPAK 2500 Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
MTD20P06HDL/D