MTD20P03HDL Datasheet, PDF (1/9 Pages) Motorola, Inc – TMOS POWER FET LOGIC LEVEL 19 AMPERES 30 VOLTS RDS(on) = 0.099 OHM

MTD20P03HDL
Preferred Device
Power MOSFET
20 Amps, 30 Volts, Logic Level
P−Channel DPAK
This Power MOSFET is designed to withstand high energy in the
avalanche and commutation modes. This energy efficient design also
offers a drain−to−source diode with a fast recovery time. Designed for
low voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
Features
• Avalanche Energy Specified
• Source−to−Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• I_DSS and V_DS(on) Specified at Elevated Temperature
• Pb−Free Packages are Available
http://onsemi.com
V_(BR)DSS
30 V
R_DS(on) TYP
90 mW@5.0 V
I_D MAX
20 A
(Note 1)
P−Channel
D
G
MAXIMUM RATINGS (T_C = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−Source Voltage
Drain−Gate Voltage (R_GS = 1.0 MW)
Gate−Source Voltage
− Continuous
− Non−Repetitive (t_pv10 ms)
Drain Current
− Continuous
− Continuous @ 100°C
− Single Pulse (t_pv10 ms)
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ T_C = 25°C (Note 2)
Operating and Storage Temperature Range
V_DSS
V_DGR
V_GS
V_GSM
I_D
I_D
I_DM
P_D
T_J, T_stg
30
Vdc
30
Vdc
"15 Vdc
"20 Vpk
19
12
57
75
0.6
1.75
−55 to
150
Adc
Apk
W
W/°C
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting T_J = 25°C
(V_DD = 25 Vdc, V_GS = 5.0 Vdc,
I_L = 19 Apk, L = 1.1 mH, R_G = 25 W)
E_AS
200
mJ
Thermal Resistance,
Junction−to−Case
Junction−to−Ambient (Note 1)
Junction−to−Ambient (Note 2)
R_qJC
R_qJA
R_qJA
°C/W
1.67
100
71.4
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
T_L
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR−4 board using the minimum recommended
pad size.
2. When surface mounted to an FR−4 board using the 0.5 sq.in. drain pad size.
4
12
3
DPAK
CASE 369C
STYLE 2
S
MARKING DIAGRAMS
1 Gate
2 Drain
3 Source
YWW
20P
03HLG
4
1
2
3
DPAK
CASE 369D
STYLE 2
1 Gate
2 Drain
3 Source
YWW
20P
03HLG
Y
WW
20P03HL
G
= Year
= Work Week
= Device Code
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2006
1
July, 2006 − Rev. 7
Publication Order Number:
MTD20P03HDL/D