MMUN2211LT1G_10 Datasheet, PDF (1/18 Pages) ON Semiconductor – Bias Resistor Transistor NPN Silicon Surface Mount Transistor

MMUN2211LT1G Series
Bias Resistor Transistor
NPN Silicon Surface Mount Transistor
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base-emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the
SOT-23 package which is designed for low power surface mount
applications.
Features
• Simplifies Circuit Design
• Reduces Board Space and Component Count
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (T_A = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
THERMAL CHARACTERISTICS
V_CBO
V_CEO
I_C
50
Vdc
50
Vdc
100
mAdc
Characteristic
Symbol
Max
Unit
Total Device Dissipation
T_A = 25°C
Derate above 25°C
P_D
246 (Note 1) mW
400 (Note 2)
1.5 (Note 1) _°C/W
2.0 (Note 2)
Thermal Resistance, Junction-to-Ambient R_qJA
508 (Note 1) °C/W
311 (Note 2)
Thermal Resistance, Junction-to-Lead
R_qJL
174 (Note 1) °C/W
208 (Note 2)
Junction and Storage Temperature
Range
T_J, T_stg − 55 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR−4 @ minimum pad
2. FR−4 @ 1.0 x 1.0 inch pad
http://onsemi.com
R1
PIN 1 R2
BASE
(INPUT)
PIN 3
COLLECTOR
(OUTPUT)
PIN 2
EMITTER
(GROUND)
MARKING DIAGRAM
SOT−23
CASE 318
STYLE 6
A8x M G
G
1
A8x = Specific Device Code
M = Date Code*
G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or overbar may
vary depending upon manufacturing location.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 17 of this data sheet.
© Semiconductor Components Industries, LLC, 2010
October, 2010 − Rev. 11
Publication Order Number:
MMUN2211LT1/D