MJ14001_05 Datasheet, PDF (1/5 Pages) ON Semiconductor – High−Current Complementary Silicon Power Transistors

MJ14001 (PNP),
MJ14002* (NPN),
MJ14003* (PNP)
*Preferred Devices
High−Current Complementary
Silicon Power Transistors
Designed for use in high−power amplifier and switching circuit
applications.
Features
• High Current Capability − I_C Continuous = 60 Amperes
• DC Current Gain − h_FE = 15−100 @ I_C = 50 Adc
• Low Collector−Emitter Saturation Voltage −V_CE(sat) = 2.5 Vdc (Max)
@ I_C = 50 Adc
• Pb−Free Packages are Available*
MAXIMUM RATINGS (T_J = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector−Emitter Voltage
MJ14001 V_CEO
MJ14002/03
60
Vdc
80
Collector−Base Voltage
MJ14001 V_CBO
MJ14002/03
60
Vdc
80
Emitter−Base Voltage
Collector Current − Continuous
Base Current − Continuous
Emitter Current − Continuous
Total Power Dissipation @ T_C = 25°C
Derate Above 25°C
V_EBO
I_C
I_B
I_E
P_D
5.0
Vdc
60
Adc
15
Adc
75
Adc
300
W
1.71
W/°C
Operating and Storage Junction
Temperature Range
T_J, T_stg −65 to +200 °C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
http://onsemi.com
60 AMPERE
COMPLEMENTARY SILICON
POWER TRANSISTORS
60−80 VOLTS, 300 WATTS
MARKING
DIAGRAM
MJ1400xG
AYYWW
MEX
TO−204 (TO−3)
CASE 197A
STYLE 1
MJ1400x = Device Code
xx = 1, 2, or 3
G
= Pb−Free Package
A
= Location Code
YY
= Year
WW
= Work Week
MEX
= Country of Orgin
360
330
270
210
150
90
30
0
0
40
80
120
160
200
240
T_C, CASE TEMPERATURE (°C)
Figure 1. Power Derating
ORDERING INFORMATION
Device
MJ14001
MJ14001G
MJ14002
Package
TO−3
TO−3
(Pb−Free)
TO−3
Shipping
100 Units/Tray
100 Units/Tray
100 Units/Tray
MJ14002G
MJ14003
MJ14003G
TO−3
(Pb−Free)
TO−3
TO−3
(Pb−Free)
100 Units/Tray
100 Units/Tray
100 Units/Tray
Preferred devices are recommended choices for future use
and best overall value.
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
1
December, 2005 − Rev. 6
Publication Order Number:
MJ14001/D