MC74VHC1GT02_15 Datasheet, PDF (1/6 Pages) ON Semiconductor – Single 2-Input NOR Gate/ CMOS Logic Level Shifter

MC74VHC1GT02
Single 2-Input NOR Gate/
CMOS Logic Level Shifter
LSTTL−Compatible Inputs
The MC74VHC1GT02 is a single gate 2−input NOR fabricated with
silicon gate CMOS technology.
The internal circuit is composed of multiple stages, including a
buffer output which provides high noise immunity and stable output.
The device input is compatible with TTL−type input thresholds and
the output has a full 5 V CMOS level output swing. The input protection
circuitry on this device allows overvoltage tolerance on the input,
allowing the device to be used as a logic−level translator from 3 V
CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to 3 V
CMOS Logic while operating at the high−voltage power supply.
The MC74VHC1GT02 input structure provides protection when
voltages up to 7 V are applied, regardless of the supply voltage. This
allows the MC74VHC1GT02 to be used to interface 5 V circuits to
3 V circuits. The output structures also provide protection when
V_CC = 0 V. These input and output structures help prevent device
destruction caused by supply voltage − input/output voltage mismatch,
battery backup, hot insertion, etc.
Features
• High Speed: t_PD = 4.7 ns (Typ) at V_CC = 5 V
• Low Power Dissipation: I_CC = 1 mA (Max) at T_A = 25°C
• TTL−Compatible Inputs: V_IL = 0.8 V; V_IH = 2 V
• CMOS−Compatible Outputs: V_OH > 0.8 V_CC; V_OL < 0.1 V_CC @Load
• Power Down Protection Provided on Inputs and Outputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: FETs = 65
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
IN B 1
IN A ²
GND 3
5 _VCC
4 OUT Y
Figure 1. Pinout
IN A
IN B
≥1
OUT Y
Figure 2. Logic Symbol
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MARKING
DIAGRAMS
5
1
SC−88A/SC70−5/SOT−353
DF SUFFIX
CASE 419A
5
VJ M G
G
1
5
1
TSOP−5/SOT23−5/SC59−5
DT SUFFIX
CASE 483
5
VJ M G
G
1
VJ = Device Code
M = Date Code*
G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may vary
depending upon manufacturing location.
PIN ASSIGNMENT
1
IN B
2
IN A
3
GND
4
OUT Y
5
V_CC
FUNCTION TABLE
Inputs
Output
A
B
Y
L
L
H
L
H
L
H
L
L
H
H
L
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
1
November, 2015 − Rev. 12
Publication Order Number:
MC74VHC1GT02/D