MC74HC10A_13 Datasheet, PDF (1/6 Pages) ON Semiconductor – Triple 3-Input NAND Gate

MC74HC10A
Triple 3-Input NAND Gate
High−Performance Silicon−Gate CMOS
The MC74HC10A is identical in pinout to the LS10. The device
inputs are compatible with Standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
Features
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance With the Requirements Defined JEDEC
Standard No. 7 A
• Chip Complexity: 36 FETs or 9 Equivalent Gates
• These are Pb−Free Devices
LOGIC DIAGRAM
1
A1
2
B1
13
C1
12
Y1
3
A2
4
B2
5
C2
6
Y2
9
A3
10
B3
11
C3
8
Y3
PIN 14 = V_CC
PIN 7 = GND
Y = ABC
PIN ASSIGNMENT
A1 1
B1 2
A2 3
B2 4
C2 5
Y2 6
GND 7
14 V_CC
13 C1
12 Y1
11 C3
10 B3
9 A3
8 Y3
http://onsemi.com
14
1
14
SOIC−14
D SUFFIX
CASE 751A
1
MARKING
DIAGRAMS
HC10AG
AWLYWW
14
1
TSSOP−14
DT SUFFIX
CASE 948G
14
HC
10A
ALYWG
G
1
A
WL, L
YY, Y
WW, W
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
FUNCTION TABLE
Inputs
Output
A
B
Y
L
L
H
L
H
H
H
L
H
H
H
L
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
1
May, 2013 − Rev. 2
Publication Order Number:
MC74HC10A/D