CM2006_16 Datasheet, PDF (1/6 Pages) ON Semiconductor – L-C LCD and Camera EMI Filter Array with ESD Protection

CM2006
Praetorian⁾ L-C LCD and
Camera EMI Filter Array
with ESD Protection
Product Description
The CM2006 connects between the VGA or DVI−I port connector
and the internal analog or digital flat panel controller logic. The
CM2006 incorporates ESD protection for all signals, level shifting for
the DDC signals and buffering for the SYNC signals. ESD protection
for the video, DDC and SYNC lines is implemented with
low−capacitance current steering diodes.
All connector interface pins are designed to safely handle the high
current spikes specified by IEC−61000−4−2 Level 4 (±8 kV contact
discharge). The ESD protection for the DDC, SYNC and VIDEO
signal pins is designed to prevent “backdrive current” when the device
is powered down while connected to a video source that is powered up.
Separate positive supply rails are provided for the VIDEO / SYNC
signals and DDC signals to facilitate interfacing with low voltage
video controller ICs and microcontrollers to provide design flexibility
in multi−supply−voltage environments.
Two Schmitt−triggered non−inverting buffers redrive and condition
the HSYNC and VSYNC signals from the video connector (SYNC1,
SYNC2). These buffers accept VESA VSIS compliant TTL input
signals and convert them to CMOS output levels that swing between
ground and V_CC.
Two N−channel MOSFETs provide the level shifting function
required when the DDC controller or EDID EEPROM is operated at a
lower supply voltage than the monitor. The gate terminals for these
MOSFETS (V_{CC_DDC}) should be connected to the supply rail
(typically 3.3 V, 2.5 V, etc.) that supplies power to the transceivers of
the DDC controller.
www.onsemi.com
QSOP16
QR SUFFIX
CASE 492
MARKING DIAGRAM
CMDYYWW
CM2006
02QR
CM2006−02QR = Specific Device Code
YY
= Year
WW
= Work Week
ORDERING INFORMATION
Device
Package
Shipping^†
CM2006−02QR
QSOP−16 2500/Tape & Reel
(Pb−Free)
Features
• Includes ESD Protection, Level−Shifting, Buffering and Sync
Impedance Matching
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
• VESA VSIS Version 1 Revision 2 Compatible Interface
• Supports Optional NAVI Signalling Requirements
• 7 Channels of ESD Protection for all VGA Port
• Bidirectional Level Shifting N−Channel FETs Provided
Connector Pins. All Pins Meet IEC−61000−4−2 Level 4
for DDC_CLK & DDC_DATA Channels
ESD Requirements (±8 kV Contact Discharge)
• Very Low Loading Capacitance from ESD Protection
Diodes on VIDEO Lines (3 pF Maximum)
• Backdrive Protection on all Lines
• Compact 16−Lead QSOP Package
• Schmitt−Triggered Input Buffers for HSYNC and
VSYNC Lines
• These Devices are Pb−Free and are RoHS Compliant
Applications
• VGA and DVI−I Ports in:
♦ Monitors
♦ TVs
© Semiconductor Components Industries, LLC, 2016
1
January, 2016 − Rev. 4
Publication Order Number:
CM2006/D