CAV25020 Datasheet, PDF (1/12 Pages) ON Semiconductor – SPI Serial CMOS EEPROM

CAV25010, CAV25020,
CAV25040
1-Kb, 2-Kb and 4-Kb SPI
Serial CMOS EEPROM
Description
The CAV25010/20/40 are 1−Kb/2−Kb/4−Kb Serial CMOS
EEPROM devices internally organized as 128x8/256x8/512x8 bits.
They feature a 16−byte page write buffer and support the Serial
Peripheral Interface (SPI) protocol. The device is enabled through a
Chip Select (CS) input. In addition, the required bus signals are a clock
input (SCK), data input (SI) and data output (SO) lines. The HOLD
input may be used to pause any serial communication with the
CAV25010/20/40 device. These devices feature software and
hardware write protection, including partial as well as full array
protection.
Features
• Automotive Temperature Grade 1 (−40°C to +125°C)
• 10 MHz SPI Compatible
• 2.5 V to 5.5 V Supply Voltage Range
• SPI Modes (0,0) & (1,1)
• 16−byte Page Write Buffer
• Self−timed Write Cycle
• Hardware and Software Protection
• Block Write Protection
− Protect 1/4, 1/2 or Entire EEPROM Array
• Low Power CMOS Technology
• 1,000,000 Program/Erase Cycles
• 100 Year Data Retention
• Industrial and Extended Temperature Range
• SOIC and TSSOP 8−Lead Packages
• These Devices are Pb−Free, Halogen Free/BFR Free, and RoHS
Compliant
V_CC
SI
CS
CAV25010
WP
CAV25020
SO
CAV25040
HOLD
SCK
V_SS
Figure 1. Functional Symbol
http://onsemi.com
SOIC−8
V SUFFIX
CASE 751BD
TSSOP−8
Y SUFFIX
CASE 948AL
PIN CONFIGURATION
CS
1
SO
V_CC
HOLD
WP
SCK
V_SS
SI
SOIC (V), TSSOP (Y)
For the location of Pin 1, please consult the
corresponding package drawing.
Pin Name
CS
SO
WP
V_SS
SI
SCK
HOLD
V_CC
PIN FUNCTION
Function
Chip Select
Serial Data Output
Write Protect
Ground
Serial Data Input
Serial Clock
Hold Transmission Input
Power Supply
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
1
January, 2012 − Rev. 0
Publication Order Number:
CAV25010/D