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BCP68T1G Datasheet, PDF (1/4 Pages) ON Semiconductor – NPN Silicon Epitaxial Transistor
BCP68T1G, SBCP68T1G
NPN Silicon
Epitaxial Transistor
This NPN Silicon Epitaxial Transistor is designed for use in low
voltage, high current applications. The device is housed in the
SOT−223 package, which is designed for medium power surface
mount applications.
Features
 High Current: IC = 1.0 A
 The SOT−223 Package Can Be Soldered Using Wave or Reflow
 SOT−223 package ensures level mounting, resulting in improved
thermal conduction, and allows visual inspection of soldered joints.
The formed leads absorb thermal stress during soldering, eliminating
the possibility of damage to the die
 The PNP Complement is BCP69T1
 AEC−Q101 Qualified and PPAP Capable
 S Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements
 These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant*
MAXIMUM RATINGS (TC = 25C unless otherwise noted)
Rating
Symbol Value
Unit
Collector−Emitter Voltage
Collector−Base Voltage
Emitter−Base Voltage
Collector Current
Total Power Dissipation @ TA = 25C
(Note 1)
Derate above 25C
VCEO
VCBO
VEBO
IC
PD
20
Vdc
25
Vdc
5.0
Vdc
1.0
Adc
1.5
W
12
mW/C
Operating and Storage Temperature
Range
TJ, Tstg − 65 to 150 C
THERMAL CHARACTERISTICS
Characteristic
Symbol Max
Unit
Thermal Resistance,
Junction−to−Ambient (Surface Mounted)
RqJA
83.3
C/W
Lead Temperature for Soldering,
0.0625 in from case
Time in Solder Bath
TL
260
C
10
Sec
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Device mounted on a glass epoxy printed circuit board 1.575 in. x 1.575 in.
x 0.059 in.; mounting pad for the collector lead min. 0.93 sq. in.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
http://onsemi.com
MEDIUM POWER NPN SILICON
HIGH CURRENT TRANSISTOR
SURFACE MOUNT
SOT−223
CASE 318E
STYLE 1
COLLECTOR 2,4
BASE
1
EMITTER 3
MARKING DIAGRAM
AYW
CA G
G
CA = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
BCP68T1G
SOT−223
(Pb−Free)
1,000/Tape & Reel
SBCP68T1G
SOT−223
(Pb−Free)
1,000/Tape & Reel
BCP68T3G
SOT−223
(Pb−Free)
4,000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
 Semiconductor Components Industries, LLC, 2011
1
November, 2011 − Rev. 7
Publication Order Number:
BCP68T1/D