ASM5P2304A Datasheet, PDF (1/8 Pages) Alliance Semiconductor Corporation – 3.3 V Zero Delay Buffer

ASM5P2304A
3.3 V Zero Delay Buffer
Description
ASM5P2304A is a versatile, 3.3 V zero−delay buffer designed to
distribute high−speed clocks in PC, workstation, datacom, telecom
and other high−performance applications. It is available in 8−pin
package. The part has an on−chip PLL which locks to an input clock
presented on the REF. The PLL feedback is required to be driven to
FBK pin, and can be obtained from one of the outputs. The
input−to−output propagation delay is guaranteed to be less than
±250 pS, and the output−to−output skew is guaranteed to be less than
200 pS.
ASM5P2304A has two banks of two outputs each. Multiple
ASM5P2304A devices can accept the same input clock and distribute
it. In this case the skew between the outputs of the two devices is
guaranteed to be less than 500 pS.
ASM5P2304A is available in two different configurations. Refer to
ASM5P2304A Configurations Table. The ASM5P2304A−1 is the base
part, where the output frequencies equal the reference if there is no
counter in the feedback path. The ASM5P2304A−1H is the high−drive
version of the −1 and the rise and fall times on this device are faster.
ASM5P2304A−2 allows the user to obtain REF and 1/2x or 2x
frequencies on each output bank. The exact configuration and output
frequencies depend on which output drives the feedback pin.
Features
• Zero Input−Output Propagation Delay, Adjustable by Capacitive
Load on FBK Input
• Multiple Configurations −
Refer to ASM5P2304A Configurations Table
• Input Frequency Range: 10 MHz to 133 MHz
− Multiple Low−skew Outputs
− Output−Output Skew less than 200 pS
− Device−Device Skew less than 500 pS
− Two Banks of Two Outputs Each
• Less than 200 pS Cycle−to−Cycle Jitter
(−1, −1H, −2, −2H)
• 8−pin SOIC Package
• 3.3 V Operation
• Commercial and Industrial Temperature Range
• Advanced 0.35 m CMOS Technology
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
http://onsemi.com
SOIC−8
S SUFFIX
CASE 751BD
PIN CONFIGURATION
1
REF
FBK
CLKA1
V_DD
CLKA2
CLKB2
GND
CLKB1
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
August, 2011 − Rev. 3
Publication Order Number:
ASM5P2304A/D