ASM2I9940L Datasheet, PDF (1/10 Pages) Alliance Semiconductor Corporation – Low Voltage 1:18 Clock Distribution Chip

ASM2I9940L
Low Voltage 1:18 Clock
Distribution Chip
Functional Description
The ASM2I9940L is a 1:18 low Voltage Clock distribution chip
with 2.5 V or 3.3 V LVCMOS output capabilities. The device features
the capability to select either a differential LVPECL or LVCMOS
compatible input. The 18 outputs are 2.5 V or 3.3 V LVCMOS
compatible and feature the drive strength to drive 50 W series or
parallel terminated transmission lines. With output−to−output skews
of 150 pS, the ASM2I9940L is ideal as a clock distribution chip for the
most demanding of Synchronous systems. The 2.5 V outputs also
make the device ideal for supplying clocks for a high performance
microprocessor based design.
With low output impedance (≈20 W), in both the HIGH and LOW
logic states, the output buffers of the ASM2I9940L are ideal for
driving series terminated transmission lines. With a 20 W output
impedance the ASM2I9940L has the capability of driving two series
terminated lines from each output. This gives the device an effective
fanout of 1:36.
The differential LVPECL inputs of the ASM2I9940L allow the
device to interface directly with a LVPECL fanout buffer to build very
wide clock fanout trees or to couple to a high frequency clock source.
The LVCMOS input provides a more standard interface for
applications requiring only a single clock distribution chip at
relatively low frequencies. In addition, the two clock sources can be
used to provide for a test clock interface as well as the primary system
clock. A logic HIGH on the LVCMOS_CLK_Sel pin will select the
LVCMOS level clock input. All inputs of the ASM2I9940L have
internal pullup/pulldown resistor, so they can be left open if unused.
The ASM2I9940L is a single or dual supply device. The device
power supply offers a high degree of flexibility. The device can
operate with a 3.3 V core and 3.3 V output, a 3.3 V core and 2.5 V
outputs as well as a 2.5 V core and 2.5 V outputs. The 32−lead LQFP
Package was chosen to optimize performance, board space and cost of
the device. The 32−lead LQFP Package has a 7 x 7 mm² body size
with conservative 0.8 mm pin spacing.
http://onsemi.com
MARKING
DIAGRAM
LQFP−32
CASE 873A
2I9940L
AWLYYWWG
2I9940L = Specific Device Code
A
= Assembly Location
WL = Wafer Lot
YY
= Year
WW = Work Week
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
Features
• LVPECL or LVCMOS Clock Input
• 2.5 V LVCMOS Outputs for Intel® Pentium® II
Microprocessor Support
• 150 pS Maximum Output−to−Output Skew
• Maximum Output Frequency of 250 MHz
• 32 Lead LQFP Package
• Dual or Single Supply Device:
♦ Dual V_CC Supply Voltage, 3.3 V Core and 2.5 V
Output
♦ Single 3.3 V V_CC Supply Voltage for 3.3 V Outputs
♦ Single 2.5 V V_CC Supply Voltage for 2.5 V I/O
• Pin and Function compatible to MPC940L, MPC9109,
CY29940 and CY29940−1
• These Devices are Pb−Free, Halogen Free/BFR Free
and are RoHS Compliant
© Semiconductor Components Industries, LLC, 2011
1
May, 2011 − Rev. 0
Publication Order Number:
ASM2I9940L/D