MSM518122 Datasheet, PDF (9/45 Pages) OKI electronic componets – 131,072-Word x 8-Bit Multiport DRAM

¡ Semiconductor
MSM518122
Notes: 1. These parameters depend on output loading. Specified values are obtained with
the output open.
2. These parameters are masured at minimum cycle test.
3. I_CC2 (Max.) are mesured under the condition of TTL input level.
4. V_IH (Min.) and V_IL (Max.) are reference levels for measuring timing of input signals.
Also, transition times are measured between V_IH and V_IL.
5. An initial pause of 200 ms is required after power-up followed by any 8 RAS cycles
(DT/OE “high”) and any 8 SC cycles before proper divice operation is achieved. In
the case of using an internal refresh counter, a minimum of 8 CAS before RAS
initialization cycles in stead of 8 RAS cycles are required.
6. AC measurements assume t_T = 5 ns.
7. RAM port outputs are mesured with a load equivalent to 1 TTL load and 100 pF.
Output reference levels are V_OH/V_OL = 2.4 V/1.0 V.
8. SAM port outputs are measured with a load equivalent to 1 TTL load and 30 pF.
Output reference levels are V_OH/V_OL = 2.0 V/1.0 V.
9. t_OFF (Max.), t_OEZ (Max.), t_SDZ (Max.) and t_SEZ (Max.) difine the time at which the
outputs achieve the open circuit condition and are not reference to output voltage
levels.
10. Either t_RCH or t_RRH must be satisfied for a read cycle.
11. These parameters are referenced to CAS leading edge of early write cycles and to
WB/WE leading edge in OE controlled write cycles and read modify write cycles.
12. t_WCS, t_RWD, t_CWD and t_AWD are not restrictive operating parameters. They are
included in the data sheet as electrical characteristics only.
If t_WCS ≥ t_WCS (Min.), the cycle is an early write cycle, and the data out pin will
remain open circuit (high impedance) throughout the entire cycle : If t_RWD ≥ t_RWD
(Min.), t_CWD ≥ t_CWD (Min.) and t_AWD ≥ t_AWD (Min.) the cycle is a read-write cycle
and the data out will contain data read from the selected cell : If neither of the above
sets of conditions is satisfied, the condition of the data out (at access time) is
indterminate.
13. Operation within the t_RCD (Max.) limit ensures that t_RAC (Max.) can be met. t_RCD
(Max.) is specified as a reference point only : If t_RCD is greater than the specified t_RCD
(Max.) limit, then access time is controlled by t_CAC.
14. Operation within the t_RAD (Max.) limit ensures that t_RAC (Max.) can be met. t_RAD
(Max.) is specified as a reference point only : If t_RAD is greater than the specified t_RAD
(Max.) limit, then access time is controlled by t_AA.
15. Input levels at the AC parameter measurement are 3.0 V/0 V.
16. Stresses greater than those listed under “Absolute Maximum Ratings” may cause
permenent damege to the device.
17. All voltages are referenced to V_SS.
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