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MSM518122 Datasheet, PDF (1/45 Pages) OKI electronic componets – 131,072-Word x 8-Bit Multiport DRAM
E2L0015-17-Y1
¡ ¡ SemicondSucetormiconductor
MSM518122
This versionM: JSaMn.5119891822
Previous version: Dec. 1996
131,072-Word ¥ 8-Bit Multiport DRAM
DESCRIPTION
The MSM518122 is an 1-Mbit CMOS multiport DRAM composed of a 131,072-word by 8-bit
dynamic RAM and a 256-word by 8-bit SAM. Its RAM and SAM operate independently and
asynchronously.
The MSM518122 supports three types of operation : random access to RAM port, high speed
serial access to SAM port and bidirectional transfer of data between any selected row in the
RAM port and the SAM port. In addition to the conventional multiport DRAM operating
modes, the MSM518122 features the block write and flash write functions on the RAM port and
a split data transfer capability on the SAM port. The SAM port requires no refresh operation
because it uses static CMOS flip-flops.
FEATURES
• Single power supply: 5 V ±10%
• Full TTL compatibility
• Multiport organization
RAM: 128K word ¥ 8 bits
SAM: 256 word ¥ 8 bits
• Fast page mode
• Write per bit
• Masked flash write
• Masked block write
• RAS only refresh
• CAS before RAS refresh
• Hidden refresh
• Serial read/write
• 256 tap location
• Bidirectional data transfer
• Split transfer
• Masked write transfer
• Refresh: 512 cycles/8 ms
• Package options:
40-pin 475 mil plastic ZIP (ZIP40-P-475-1.27)
40-pin 400 mil plastic SOJ (SOJ40-P-400-1.27)
(Product : MSM518122-xxZS)
(Product : MSM518122-xxJS)
xx indicates speed rank.
PRODUCT FAMILY
Family
MSM518122-70
MSM518122-80
MSM518122-10
Access Time
RAM SAM
70 ns 25 ns
80 ns 25 ns
100 ns 25 ns
Cycle Time
RAM SAM
140 ns 30 ns
150 ns 30 ns
180 ns 30 ns
Power Dissipation
Operating Standby
120 mA
8 mA
110 mA
8 mA
100 mA
8 mA
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