LPC54102J256BD64QL Datasheet, PDF (9/90 Pages) NXP Semiconductors – 32-bit ARM Cortex-M4/M0+ MCU; 104 kB SRAM; 512 kB flash, 3 x I2C, 2 x SPI, 4 x USART, 32-bit counter/ timers, SCTimer/PWM, 12-bit 5.0 Msamples/sec ADC

NXP Semiconductors
LPC5410x
32-bit ARM Cortex-M4/M0+ microcontroller
6.2 Pin description
On the LPC5410x, digital pins are grouped into two ports. Each digital pin may support up
to four different digital functions and one analog function, including General Purpose I/O
(GPIO).
Table 4. Pin description
Symbol
Description
PIO0_0
PIO0_1
PIO0_2
PIO0_3
PIO0_4
A6 31 ^[2] PU I/O PIO0_0 — General-purpose digital input/output pin.
Remark: In ISP mode, this pin is the UART0 RXD function.
I U0_RXD — Receiver input for USART0.
I/O SPI0_SSEL0 — Slave Select 0 for SPI0.
I CT32B0_CAP0 — 32-bit CT32B0 capture input 0.
I R — Reserved.
O SCT0_OUT3 — SCT0 output 3. PWM output 3.
B6 32 ^[2] PU I/O PIO0_1 — General-purpose digital input/output pin.
Remark: In ISP mode, this pin is the UART0 TXD function.
O U0_TXD — Transmitter output for USART0.
I/O SPI0_SSEL1 — Slave Select 1 for SPI0.
I CT32B0_CAP1 — 32-bit CT32B0 capture input 1.
I R — Reserved.
O SCT0_OUT1 — SCT0 output 1. PWM output 1.
- 36 ^[2] PU I/O PIO0_2 — General-purpose digital input/output pin.
I U0_CTS — Clear To Send input for USART0.
I R — Reserved.
I CT32B2_CAP1 — 32-bit CT32B2 capture input 1.
I R — Reserved.
- 37 ^[2] PU I/O PIO0_3 — General-purpose digital input/output pin.
O U0_RTS — Request To Send output for USART0.
I R — Reserved.
O CT32B1_MAT3 — 32-bit CT32B1 match output 3.
I R — Reserved.
C7 38 ^[2] PU I/O PIO0_4 — General-purpose digital input/output pin.
I/O U0_SCLK — USART0 clock in synchronous USART mode.
I/O SPI0_SSEL2 — Slave Select 2 for SPI0.
I CT32B0_CAP2 — 32-bit CT32B0 capture input 2.
I R — Reserved.
LPC5410x
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2.6 — 3 October 2016
© NXP B.V. 2016. All rights reserved.
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