74HC2G66GT Datasheet, PDF(9/23 Page) NXP Semiconductors – Dual single-pole single-throw analog switch

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74HC2G66GT Datasheet, PDF (9/23 Pages) NXP Semiconductors – Dual single-pole single-throw analog switch

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NXP Semiconductors

74HC2G66; 74HCT2G66

Dual single-pole single-throw analog switch

Table 9. Dynamic characteristics â¦continued

Voltages are referenced to GND (ground = 0 V); For test circuit see Figure 12.

Symbol Parameter

Conditions

ï40 ï°C to +85 ï°C

Min Typ[1] Max

74HCT2G66

tpd

propagation delay nY to nZ or nZ to nY; RL = ï¥ ï; [2]

see Figure 10

ten

enable time

VCC = 4.5 V

nE to nY or nZ; see Figure 11

[2]

tdis

disable time

VCC = 4.5 V

nE to nY or nZ; see Figure 11

[2]

VCC = 4.5 V

CPD

power dissipation VI = GND to VCC ï 1.5 V

capacitance

[3]

ï40 ï°C to +125 ï°C Unit

Min

Max

18 ns

36 ns

53 ns

[1] All typical values are measured at Tamb = 25 ï°C.

[2] tpd is the same as tPLH and tPHL.

ten is the same as tPZL and tPZH.

tdis is the same as tPLZ and tPHZ.

[3] CPD is used to determine the dynamic power dissipation PD (ïW).

PD = CPD ï´ VCC2 ï´ fi + ï((CL ï´ CSW) ï´ VCC2 ï´ fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

CSW = maximum switch capacitance in pF (see Table 7);

VCC = supply voltage in volts;

ï((CL ï´ CSW) ï´ VCC2 ï´ fo) = sum of outputs.

11.1 Waveforms and test circuit

nY or nZ

input

GND

nZ or nY

output

VOH

VOL

t PLH

t PHL

001aaa541

Measurement points are given in Table 10.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig 10. Input (nY or nZ) to output (nZ or nY) propagation delays

74HC_HCT2G66

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 10 â 3 October 2013

9 of 23

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