PRTR5V0U2K Datasheet, PDF (8/12 Pages) NXP Semiconductors – Ultra low capacitance double rail-to-rail ESD protection

NXP Semiconductors
8. Package outline
PRTR5V0U2F; PRTR5V0U2K
Ultra low capacitance double rail-to-rail ESD protection
1.05
0.95
0.6
3
4
0.5
1.5
2
5
1.4
0.5
1
6
0.40
0.35
0.32
0.27
Dimensions in mm
0.25
0.17
0.50
1.05
max
0.95
0.04
max
0.55
04-07-22
3
0.35
1.05
0.95
2
0.35
1
0.40
0.32
Dimensions in mm
4
0.20
5
0.12
6
0.35
0.27
0.5
max
0.04
max
07-05-15
Fig 6. Package outline PRTR5V0U2F (SOT886)
Fig 7. Package outline PRTR5V0U2K (SOT891)
9. Packing information
Table 10. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.^[1]
Type number Package Description
PRTR5V0U2F SOT886
PRTR5V0U2K SOT891
4 mm pitch, 8 mm tape and reel; T1
4 mm pitch, 8 mm tape and reel; T4
4 mm pitch, 8 mm tape and reel
Packing quantity
5 000
[2] _-115
[3] _-132
-132
[1] For further information and the availability of packing methods, see Section 13.
[2] T1: normal taping
[3] T4: 90° rotated reverse taping
PRTR5V0U2F_PRTR5V0U2K_1
Product data sheet
Rev. 01 — 6 November 2008
© NXP B.V. 2008. All rights reserved.
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