PCA9849PWJ Datasheet, PDF (8/30 Pages) NXP Semiconductors – 4-channel ultra-low voltage, Fm+ I2C-bus multiplexer with reset

NXP Semiconductors
PCA9849
4-channel ultra-low voltage, Fm+ I²C-bus multiplexer with reset
manufacturer 0 0 0 0 0 0 0 0 0 0 0 0
part identification
100001001
revision
Fig 8. PCA9849 Device ID field
000
aaa-018028
acknowledge from
one or several slaves _{I2C-bus slave address}
Device ID address
of the device to be identified
acknowledge from
slave to be identified
Device ID address
acknowledge from
slave to be identified
S 1 1 1 1 1 0 0 0 A A7 A6 A5 A4 A3 A2 A1 0 A Sr 1 1 1 1 1 0 0 1 A
START condition
R/W
acknowledge
from master
don’t care
repeated START
condition
acknowledge
from master
R/W
no acknowledge
from master
M
11
M
10
M9 M8 M7 M6 M5 M4
A
M3 M2 M1 M0 P8 P7 P6 P5
A
P4 P3 P2 P1 P0 R2 R1 R0
A
P
manufacturer name = 000000000000
part identification = 100001010
STOP condition
revision = 000
aaa-011781
Fig 9.
If more than 3 bytes are read, the slave device loops back to the first byte (manufacturer byte) and keeps sending data until the
master generates a ‘no acknowledge’.
Device ID field read operation
6.3 Control register
Following the successful acknowledgement of the slave address, the bus master will send
a byte to the PCA9849, which will be stored in the control register. If multiple bytes are
received by the PCA9849, it will save the last byte received. This register can be written
and read via the I²C-bus.
channel selection bits
(read/write)
76543210
X X X X B3 B2 B1 B0
channel 0
channel 1
channel 2
channel 3
002aab190
Fig 10. Control register
PCA9849
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 November 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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