PCA9849PWJ Datasheet, PDF (6/30 Pages) NXP Semiconductors – 4-channel ultra-low voltage, Fm+ I2C-bus multiplexer with reset

NXP Semiconductors
PCA9849
4-channel ultra-low voltage, Fm+ I²C-bus multiplexer with reset
6.2 Software Reset General Call, and device ID addresses
Two other different addresses can be sent to the device.
• General Call address: allows to reset the device through the I²C-bus upon reception
of the right I²C-bus sequence. See Section 6.2.1 “Software Reset” for more
information.
• Device ID address: allows to read ID information from the device (manufacturer, part
identification, revision). See Section 6.2.2 “Device ID (PCA9849 ID field)” for more
information.
R/W
00000000
002aac115
Fig 5. General Call address
1 1 1 1 1 0 0 R/W
002aac116
Fig 6. Device ID address
6.2.1 Software Reset
The Software Reset Call allows all the devices in the I²C-bus to be reset to the power-up
state value through a specific formatted I²C-bus command. To be performed correctly, it
implies that the I²C-bus is functional and that there is no device hanging the bus.
The Software Reset sequence is defined as following:
1. A START command is sent by the I²C-bus master.
2. The reserved General Call I²C-bus address ‘0000 000’ with the R/W bit set to 0 (write)
is sent by the I²C-bus master.
3. The device acknowledges after seeing the General Call address ‘0000 0000’ (00h)
only. If the R/W bit is set to 1 (read), no acknowledge is returned to the I²C-bus
master.
4. Once the General Call address has been sent and acknowledged, the master sends
1 byte. The value of the byte must be equal to 06h.
a. The device acknowledges this value only. If the byte is not equal to 06h, the device
does not acknowledge it.
If more than 1 byte of data is sent, the device does not acknowledge any more.
5. Once the right byte has been sent and correctly acknowledged, the master sends a
STOP command to end the Software Reset sequence: the device then resets to the
default value (power-up value) and is ready to be addressed again within the specified
bus free time. If the master sends a Repeated START instead, no reset is performed.
The I²C-bus master must interpret a non-acknowledge from the device (at any time) as a
‘Software Reset Abort’. The device does not initiate a reset of its registers.
The unique sequence that initiates a Software Reset is described in Figure 7.
PCA9849
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 November 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
6 of 30