PCA9544A_09 Datasheet, PDF (8/26 Pages) NXP Semiconductors – 4-channel I2C-bus multiplexer with interrupt logic

NXP Semiconductors
PCA9544A
4-channel I²C-bus multiplexer with interrupt logic
6.4 Power-on reset
When power is applied to V_DD, an internal Power-On Reset (POR) holds the PCA9544A in
a reset condition until V_DD has reached V_POR. At this point, the reset condition is released
and the PCA9544A registers and I²C-bus state machine are initialized to their default
states (all zeroes), causing all the channels to be deselected. Thereafter, V_DD must be
lowered below 0.2 V to reset the device.
6.5 Voltage translation
The pass gate transistors of the PCA9544A are constructed such that the V_DD voltage can
be used to limit the maximum voltage that will be passed from one I²C-bus to another.
5.0
V_o(sw)
(V)
4.0
3.0
2.0
002aaa964
(1)
(2)
(3)
1.0
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
V_DD (V)
(1) maximum
(2) typical
(3) minimum
Fig 7. Pass gate voltage versus supply voltage
Figure 7 shows the voltage characteristics of the pass gate transistors (note that the graph
was generated using the data specified in Section 11 “Dynamic characteristics” of this
data sheet). In order for the PCA9544A to act as a voltage translator, the V_o(sw) voltage
should be equal to, or lower than the lowest bus voltage. For example, if the main bus was
running at 5 V, and the downstream buses were 3.3 V and 2.7 V, then V_o(sw) should be
equal to or below 2.7 V to effectively clamp the downstream bus voltages. Looking at
Figure 7, we see that V_o(sw)(max) will be at 2.7 V when the PCA9544A supply voltage is
3.5 V or lower so the PCA9544A supply voltage could be set to 3.3 V. Pull-up resistors can
then be used to bring the bus voltages to their appropriate levels (see Figure 14).
More Information can be found in Application Note AN262, PCA954X family of I²C/SMBus
multiplexers and switches.
PCA9544A_4
Product data sheet
Rev. 04 — 15 June 2009
© NXP B.V. 2009. All rights reserved.
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