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| 74HCT32D-T Datasheet, PDF (8/17 Pages) NXP Semiconductors – Quad 2-input OR gate | |||
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NXP Semiconductors
74HC32; 74HCT32
Quad 2-input OR gate
VI 90 %
negative
pulse
GND
VI
positive
pulse
10 %
GND
VM
10 %
tf
tr
90 %
VM
VI
G
RT
tW
tW
VCC
DUT
VM
tr
tf
VM
VO
CL
001aah768
Fig 7.
Test data is given in Table 9.
Definitions test circuit:
RT = termination resistance should be equal to output impedance Zo of the pulse generator.
CL = load capacitance including jig and probe capacitance.
Load circuitry for measuring switching times
Table 9. Test data
Type
74HC32
74HCT32
Input
VI
VCC
3.0 V
tr, tf
6.0 ns
6.0 ns
Load
CL
15 pF, 50 pF
15 pF, 50 pF
Test
tPLH, tPHL
tPLH, tPHL
74HC_HCT32
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 â 4 September 2012
© NXP B.V. 2012. All rights reserved.
8 of 17
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