74HCT32D-T Datasheet, PDF (3/17 Pages) NXP Semiconductors – Quad 2-input OR gate

NXP Semiconductors
74HC32; 74HCT32
Quad 2-input OR gate
5. Pinning information
5.1 Pinning
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
14 V_CC
13 4B
12 4A
32
11 4Y
10 3B
9 3A
8 3Y
001aad101
Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14
terminal 1
index area
1B 2
1Y 3
2A 4
2B 5
2Y 6
32
GND⁽¹⁾
13 4B
12 4A
11 4Y
10 3B
9 3A
001aad102
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It cannot be used as a
supply pin or input.
Fig 5. Pin configuration DHVQFN14
5.2 Pin description
Table 2.
Symbol
1A to 4A
1B to 4B
1Y to 4Y
GND
V_CC
Pin description
Pin
1, 4, 9, 12
2, 5, 10,13
3, 6, 8, 11
7
14
Description
data input
data input
data output
ground (0 V)
supply voltage
6. Functional description
Table 3. Function table^[1]
Input
nA
nB
L
L
L
H
H
L
H
H
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
Output
nY
L
H
H
H
74HC_HCT32
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 4 September 2012
© NXP B.V. 2012. All rights reserved.
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