PCA9617A Datasheet, PDF (7/24 Pages) NXP Semiconductors – Level translating Fm+ I2C-bus repeater

NXP Semiconductors
PCA9617A
Level translating Fm+ I²C-bus repeater
HIGH. It is important to note that any arbitration or clock stretching events require that the
LOW level on the B bus side at the input of the PCA9617A (V_IL) be at or below 0.4 V to be
recognized by the PCA9617A and then transmitted to the A bus side.
Multiple PCA9617A port A sides can be connected in a star configuration (Figure 5),
allowing all nodes to communicate with each other.
Multiple PCA9617As can be connected in series (Figure 6) as long as port A is connected
to port B. I²C-bus slave devices can be connected to any of the bus segments. The
number of devices that can be connected in series is limited by repeater
delay/time-of-flight considerations on the maximum bus speed requirements.
V_CC(A)
V_CC(B)
1.4 kΩ
SDA
SCL
BUS
MASTER
1.4 kΩ
V_CC(A)
1.4 kΩ
V_CC(B)
SDAA
SCLA
SDAB
SCLB
PCA9617A
EN
1.4 kΩ
SDA
SCL
SLAVE
1000 kHz
Fig 5. Typical star application
V_CC(A)
1.4 kΩ
V_CC(B)
SDAA
SCLA
SDAB
SCLB
PCA9617A
EN
1.4 kΩ
SDA
SCL
SLAVE
1000 kHz
V_CC(A)
1.4 kΩ
V_CC(B)
SDAA
SCLA
SDAB
SCLB
PCA9617A
EN
1.4 kΩ
SDA
SCL
SLAVE
1000 kHz
002aag645
PCA9617A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 20 March 2013
© NXP B.V. 2013. All rights reserved.
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