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74ALVC32 Datasheet, PDF (7/13 Pages) Fairchild Semiconductor – Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs
NXP Semiconductors
74ALVC32
Quad 2-input OR gate
VI 90 %
tW
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
VEXT
RL
RT
CL
RL
001aae331
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 7. Test circuitry for switching times
Table 9. Test data
Supply voltage VCC
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
Input
VI
VCC
VCC
2.7 V
2.7 V
tr, tf
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
Load
CL
30 pF
30 pF
50 pF
50 pF
RL
1 kΩ
500 Ω
500 Ω
500 Ω
VEXT
tPLH, tPHL
open
open
open
open
tPLZ, tPZL
2 × VCC
2 × VCC
6V
6V
tPHZ, tPZH
GND
GND
GND
GND
74ALVC32_2
Product data sheet
Rev. 02 — 10 December 2007
© NXP B.V. 2007. All rights reserved.
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