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| 74AHC00 Datasheet, PDF (7/13 Pages) NXP Semiconductors – Quad 2-input NAND gate | |||
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NXP Semiconductors
74AHC00; 74AHCT00
Quad 2-input NAND gate
VI 90 %
tW
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
PULSE
VI
GENERATOR
VCC
VO
DUT
RT
VCC
RL S1
CL
open
001aad983
Test data is given in Table 9.
Deï¬nitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 7. Load circuit for switching times
Table 9. Test data
Type
Input
74AHC00
74AHCT00
VI
VCC
3.0 V
tr, tf
⤠3.0 ns
⤠3.0 ns
Load
CL
15 pF, 50 pF
15 pF, 50 pF
RL
1 kâ¦
1 kâ¦
S1 position
tPHL, tPLH
open
open
tPZH, tPHZ
GND
GND
tPZL, tPLZ
VCC
VCC
74AHC_AHCT00_3
Product data sheet
Rev. 03 â 8 January 2008
© NXP B.V. 2008. All rights reserved.
7 of 13
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