ISP1504A1_07 Datasheet, PDF (65/81 Pages) NXP Semiconductors – ULPI Hi-Speed Universal Serial Bus On-The-Go transceiver

NXP Semiconductors
ISP1504A1; ISP1504C1
ULPI HS USB OTG transceiver
Table 57. Dynamic characteristics: analog I/O pins DP and DM …continued
V_CC = 3.0 V to 4.5 V; V_CC(I/O) = 1.65 V to 3.6 V; T_amb = −40 °C to +85 °C; unless otherwise specified.
Typical values are at V_CC = 3.6 V; V_CC(I/O) = 1.8 V; T_amb = +25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Single-ended receiver
t_PLH(se) single-ended propagation delay DP, DM to RX_RCV, RX_DP -
-
17
ns
(LOW to HIGH)
and RX_DM; see Figure 26
t_PHL(se) single-ended propagation delay DP, DM to RX_RCV, RX_DP -
-
17
ns
(HIGH to LOW)
and RX_DM; see Figure 26
V_OH
t_HSR, t_FR, t_LR
90 %
t_HSF, t_FF, t_LF
90 %
10 %
V_OL
Fig 23. Rise time and fall time
10 %
004aaa861
1.8 V
logic input 0.9 V
0V
V_OH
differential
data lines
V_OL
t_PLH(drv)
V_CRS
0.9 V
t_PHL(drv)
V_CRS
004aaa573
Fig 24. Timing of TX_DAT and TX_SE0 to DP and DM
1.8 V
logic _{0.9 V}
input
0V
V_OH
differential
data lines
V_OL
t_PZH
t_PZL
V_CRS
0.9 V
t_PHZ
t_PLZ
V_OH − 0.3 V
V_OL + 0.3 V
004aaa574
2.0 V
differential
data lines
0.8 V
V_OH
V_CRS
t_PLH(rcv)
t_PLH(se)
logic output
0.9 V
V_OL
V_CRS
t_PHL(rcv)
t_PHL(se)
0.9 V
004aaa575
Fig 25. Timing of TX_ENABLE to DP and DM
Fig 26. Timing of DP and DM to RX_RCV, RX_DP and
RX_DM
14.1 Timing characteristics
ULPI interface timing requirements are given in Figure 27. This timing apply to
synchronous mode only. All timing is measured with respect to the ISP1504x1 CLOCK
pin. All signals are clocked on the rising edge of CLOCK.
ISP1504A1_ISP1504C1_1
Product data sheet
Rev. 01 — 6 August 2007
© NXP B.V. 2007. All rights reserved.
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