TDA8933B Datasheet, PDF (6/42 Pages) NXP Semiconductors – Class D audio amplifier

NXP Semiconductors
TDA8933B
Class D audio amplifier
8.2 Mode selection and interfacing
The TDA8933B can be switched to one of four operating modes using pins POWERUP
and ENGAGE:
• Sleep mode: with low supply current.
• Mute mode: the amplifiers are switching to idle (50 % duty cycle), but the audio signal
at the output is suppressed by disabling the V_l-converter input stages. The capacitors
on pins HVP1 and HVP2 have been charged to half the supply voltage (asymmetrical
supply only)
• Operating mode: the amplifiers are fully operational with an output signal
• Fault mode
Both pins POWERUP and ENGAGE refer to pin CGND.
Table 4 shows the different modes as a function of the voltages on the POWERUP and
ENGAGE pins.
Table 4. Mode selection for the TDA8933B
Mode
Pin
POWERUP^[1]
ENGAGE^[1]
Sleep
< 0.8 V
< 0.8 V
Mute
2 V to 6 V
< 0.8 V
Operating
2 V to 6 V
2.4 V to 6 V
Fault
2 V to 6 V
undefined
DIAG
undefined
>2V
>2V
< 0.8 V
[1] When there are symmetrical supply conditions, the voltage applied to pins POWERUP and ENGAGE must
never exceed the supply voltage (V_DDA, V_DDP1 or V_DDP2).
If the transition between Mute mode and Operating mode is controlled via a time constant,
the start-up will be pop-free since the DC output offset voltage is applied gradually to the
output. The bias current setting of the V/I-converters is related to the voltage on pin
ENGAGE.
• Mute mode: the bias current setting of the V/I-converters is zero (V/I-converters
disabled).
• Operating mode: the bias current is at maximum.
The time constant required to apply the DC output offset voltage gradually between Mute
mode and Operating mode can be generated by applying a capacitor on pin ENGAGE.
The value of the capacitor on pin ENGAGE should be 470 nF.
TDA8933B_1
Preliminary data sheet
Rev. 01 — 23 October 2008
© NXP B.V. 2008. All rights reserved.
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