PSMN5R0-30YL Datasheet, PDF (6/13 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET

NXP Semiconductors
PSMN5R0-30YL
N-channel TrenchMOS logic level FET
Table 6. Characteristics …continued
Symbol
Parameter
Conditions
Source-drain diode
V_SD
source-drain voltage I_S = 25 A; V_GS = 0 V; T_j = 25 °C; see
Figure 17
t_rr
reverse recovery time I_S = 20 A; dI_S/dt = -100 A/s; V_GS = 0 V;
Q_r
recovered charge
V_DS = 20 V
Min Typ Max Unit
-
0.88 1.2
V
-
30
-
ns
-
21
-
nC
120
I_D 10
(A)
100
4.5
003aac548
80
V_GS (V) = 3.2
60
3
40
2.8
2.6
20
2.4
2.2
0
0
2
4
6
8
10
V_DS (V)
10
R_DSon
(mΩ)
8
V_GS (V) = 3.2 V
6
4
2
0
0
20
003aac550
4.5
10
40 I_D (A) 60
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical
values
Fig 6. Drain-source on-state resistance as a
function of drain current; typical values
80
003aac552
80
I_D
g_fs
(A)
(S)
70
60
60
40
50
20
T_j = 150 °C
25 °C
40
003aac555
0
0
1
2
3 _{VGS (V)} 4
30
0
10
20
30 _{ID (A)} 40
Fig 7. Transfer characteristics: drain current as a
function of gate-source voltage; typical
values
Fig 8. Forward transconductance as a function of
drain current; typical values
PSMN5R0-30YL_1
Preliminary data sheet
Rev. 01 — 10 September 2008
© NXP B.V. 2008. All rights reserved.
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