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PHN210T Datasheet, PDF (6/7 Pages) NXP Semiconductors – Dual N-channel enhancement mode
Philips Semiconductors
Dual N-channel enhancement mode
TrenchMOSTM transistor
MECHANICAL DATA
SO8: plastic small outline package; 8 leads; body width 3.9 mm
Product specification
PHN210T
SOT96-1
D
y
Z
8
c
5
E
A
X
HE
vM A
pin 1 index
1
e
A2
A1
4
bp
wM
Q
(A 3)
A
θ
Lp
L
detail X
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
UNIT max. A1
A2
A3
bp
c
D(1) E(2)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
5.0
4.8
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25 0.25
0.1
0.7
0.3
8o
inches
0.069
0.010
0.004
0.057
0.049
0.01
0.019 0.0100 0.20
0.014 0.0075 0.19
0.16
0.15
0.050
0.244
0.228
0.041
0.039
0.016
0.028
0.024
0.01
0.01
0.004
0.028
0.012
0o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT96-1
IEC
076E03S
REFERENCES
JEDEC
EIAJ
MS-012AA
EUROPEAN
PROJECTION
ISSUE DATE
95-02-04
97-05-22
Fig.16. SOT96 surface mounting package.
Notes
1. This product is supplied in anti-static packaging. The gate-source input must be protected against static
discharge during transport or handling.
2. Refer to Integrated Circuit Packages, Data Handbook IC26.
3. Epoxy meets UL94 V0 at 1/8".
March 1999
6
Rev 1.000