74HC02D652 Datasheet, PDF(6/16 Page) NXP Semiconductors

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74HC02D652 Datasheet, PDF (6/16 Pages) NXP Semiconductors – Quad 2-input NOR gate

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NXP Semiconductors

74HC02; 74HCT02

Quad 2-input NOR gate

Table 7. Dynamic characteristics

GND = 0 V; CL = 50 pF; for load circuit see Figure 7.

Symbol Parameter

Conditions

Min

74HCT02

tpd

propagation delay nA, nB to nY; see Figure 6

VCC = 4.5 V

VCC = 5.0 V; CL = 15 pF

transition time

VCC = 4.5 V; see Figure 6

CPD

power dissipation per package;

capacitance

VI = GND to VCC ï 1.5 V

[1]

[2]

[3]

[1] tpd is the same as tPHL and tPLH.

[2] tt is the same as tTHL and tTLH.

[3] CPD is used to determine the dynamic power dissipation (PD in ïW):

PD = CPD ï´ VCC2 ï´ fi ï´ N + ï¥ (CL ï´ VCC2 ï´ fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

ï¥ (CL ï´ VCC2 ï´ fo) = sum of outputs.

25 ï°C

Typ

ï40 ï°C to +125 ï°C Unit

Max Max

Max

(85 ï°C) (125 ï°C)

29 ns

- ns

22 ns

- pF

11. Waveforms

nA, nB input

GND

VOH

nY output

VOL

tPHL

tTHL

tPLH

tTLH

Fig 6.

Measurement points are given in Table 9.

VOL and VOH are typical voltage output levels that occur with the output load.

Input to output propagation delays

001aai814

Table 8. Measurement points

Type

Input

74HC02

74HCT02

0.5VCC

1.3 V

Output

0.5VCC

1.3 V

0.1VCC

0.9VCC

74HC_HCT02

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 4 â 4 September 2012

6 of 16

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