LPC1769_11 Datasheet, PDF (58/79 Pages) NXP Semiconductors – 32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet

NXP Semiconductors
LPC1769/68/67/66/65/64/63
32-bit ARM Cortex-M3 microcontroller
11.7 SSP interface
Table 15. Dynamic characteristic: SSP interface
T_amb = 25 °C; V_DD(3V3) over specified ranges.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
SSP interface
t_{su(SPI_MISO)} SPI_MISO set-up time
measured in SPI Master mode;
see Figure 20
[1] ₃₀
-
ns
[1] The peripheral clock for SSP is PCLK = CCLK = 20 MHz.
shifting edges
SCK
sampling edges
MOSI
MISO
t_{su(SPI_MISO)}
Fig 20. MISO line set-up time in SSP Master mode
002aad326
LPC1769_68_67_66_65_64_63
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 5 April 2011
© NXP B.V. 2011. All rights reserved.
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