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LPC2468_08 Datasheet, PDF (51/72 Pages) NXP Semiconductors – Single-chip 16-bit/32-bit micro; 512 kB flash, Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface
NXP Semiconductors
LPC2468
Fast communication chip
Table 8. ADC static characteristics
VDDA = 2.5 V to 3.6 V; Tamb = −40 °C to +85 °C unless otherwise specified; ADC frequency 4.5 MHz.
Symbol
Parameter
Conditions
Min
Typ
VIA
Cia
ED
EL(adj)
EO
EG
ET
Rvsi
analog input voltage
analog input capacitance
differential linearity error
integral non-linearity
offset error
gain error
absolute error
voltage source interface
resistance
0
-
-
-
[1][2][3] -
-
[1][4] -
-
[1][5] -
-
[1][6] -
-
[1][7] -
-
[8] -
-
Max
VDDA
1
±1
±2
±3
±0.5
±4
40
Unit
V
pF
LSB
LSB
LSB
%
LSB
kΩ
[1] Conditions: VSSA = 0 V, VDDA = 3.3 V.
[2] The ADC is monotonic, there are no missing codes.
[3] The differential linearity error (ED) is the difference between the actual step width and the ideal step width. See Figure 5.
[4] The integral non-linearity (EL(adj)) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
appropriate adjustment of gain and offset errors. See Figure 5.
[5] The offset error (EO) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
ideal curve. See Figure 5.
[6] The gain error (EG) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
error, and the straight line which fits the ideal transfer curve. See Figure 5.
[7] The absolute error (ET) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated ADC
and the ideal transfer curve. See Figure 5.
[8] See Figure 6.
LPC2468_4
Product data sheet
Rev. 04 — 17 October 2008
© NXP B.V. 2008. All rights reserved.
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