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PSMN4R5-40PS Datasheet, PDF (5/13 Pages) NXP Semiconductors – N-channel 40 V 4.6 mΩ standard level MOSFET
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NXP Semiconductors
PSMN4R5-40PS
N-channel 40 V 4.6 mΩ standard level MOSFET
6. Characteristics
Table 6. Characteristics
Tested to JEDEC standards where applicable.
Symbol Parameter
Conditions
Min Typ Max Unit
Static characteristics
V(BR)DSS
VGS(th)
drain-source
breakdown voltage
gate-source threshold
voltage
ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 1 mA; VDS = VGS; Tj = -55 °C; see
Figure 11; see Figure 12
36
-
40
-
-
-
-
V
-
V
4.6 V
ID = 1 mA; VDS = VGS; Tj = 175 °C; see
Figure 11; see Figure 12
1
-
-
V
ID = 1 mA; VDS = VGS; Tj = 25 °C; see
Figure 11; see Figure 12
2
3
4
V
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
VDS = 40 V; VGS = 0 V; Tj = 25 °C
VDS = 40 V; VGS = 0 V; Tj = 125 °C
VGS = 20 V; VDS = 0 V; Tj = 25 °C
VGS = -20 V; VDS = 0 V; Tj = 25 °C
VGS = 10 V; ID = 25 A; Tj = 100 °C; see
Figure 13
-
-
3
µA
-
-
60
µA
-
-
100 nA
-
-
100 nA
-
-
6.7 mΩ
VGS = 10 V; ID = 25 A; Tj = 25 °C; see
Figure 13;
[1] -
3.9 4.6 mΩ
RG
internal gate resistance f = 1 MHz
(AC)
-
0.97 -
Ω
Dynamic characteristics
QG(tot)
total gate charge
ID = 0 A; VDS = 0 V; VGS = 10 V
ID = 25 A; VDS = 20 V; VGS = 10 V; see
Figure 14; see Figure 15
-
35
-
nC
-
42.3 -
nC
QGS
QGS(th)
gate-source charge
pre-threshold
gate-source charge
ID = 25 A; VDS = 20 V; VGS = 10 V; see
Figure 14; see Figure 15
-
13.8 -
nC
-
7.9 -
nC
QGS(th-pl) post-threshold
gate-source charge
-
5.9 -
nC
QGD
VGS(pl)
gate-drain charge
gate-source plateau
voltage
ID = 25 A; VDS = 20 V; see Figure 14
-
8.8 -
nC
-
4.8 -
V
Ciss
input capacitance
VDS = 12 V; VGS = 0 V; f = 1 MHz;
Coss
output capacitance
Tj = 25 °C; see Figure 16
Crss
reverse transfer
capacitance
-
2683 -
pF
-
660 -
pF
-
290 -
pF
td(on)
tr
td(off)
tf
turn-on delay time
rise time
turn-off delay time
fall time
VDS = 12 V; RL = 0.5 Ω; VGS = 10 V;
RG(ext) = 4.7 Ω
-
19
-
ns
-
23
-
ns
-
30
-
ns
-
9
-
ns
PSMN4R5-40PS_2
Product data sheet
Rev. 02 — 25 June 2009
© NXP B.V. 2009. All rights reserved.
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