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PCA2002 Datasheet, PDF (5/25 Pages) NXP Semiconductors – 32 kHz watch circuit with programmable output period and pulse width
NXP Semiconductors
PCA2002
32 kHz watch circuit programmable output period and pulse width
Table 3. Time calibration
Calibration
period
Correction per step (n = 1)
Correction per step (n = 127)
ppm
seconds per day ppm
seconds per day
1 minute
2.03
0.176
258
22.3
2 minutes
1.017
0.088
129
11.15
After measuring the effective oscillator frequency, the number of correction pulses must
be calculated and stored together with the calibration period in the OTP memory (see
Section 7.6).
The oscillator frequency can be measured at pad RESET, where a square wave signal
with the frequency of 1---0--1-2---4-- × f osc is provided.
This frequency shows a jitter every minute or every two minutes, depending on the
programmed calibration period, which originates from the time calibration.
Details on how to measure the oscillator frequency and the programmed inhibition time
are given in Section 7.10.
7.3 Reset
At pin RESET an output signal with a frequency of 1----0-1--2---4- × f osc = 32Hz is provided.
Connecting pin RESET to VDD stops the motor drive and opens the motor switches.
After releasing pin RESET, the first motor pulse is generated exactly one period later with
the opposite polarity to the last pulse before stopping. The debounce time for the reset
function is between 31 ms and 62 ms.
Connecting pin RESET to VSS activates the test mode. In this mode the motor output
frequency is 32 Hz, which can be used to test the mechanical function of the watch.
7.4 Programming possibilities
The programming data is organized in an array of 8-bit words (see Table 4). A contains the
time calibration, B the setting for the monitor pulses, C is not used and D contains the type
recognition (see Table 7).
Table 4. Words and bits
Word Bit
1
2
3
4
5
6
A
number of 8192 Hz pulses to be removed
B
pulse width
output period
C
D
type
factory test bit
7
duty
cycle
8
calibration
period
pulse
stretching
PCA2002_5
Product data sheet
Rev. 05 — 11 November 2008
© NXP B.V. 2008. All rights reserved.
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