SC16IS740_11 Datasheet, PDF (46/63 Pages) NXP Semiconductors – Single UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs

NXP Semiconductors
SC16IS740/750/760
Single UART with I²C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
Table 36. Static characteristics …continued
V_DD = 2.5 V  0.2 V, T_amb = 40 C to +85 C; or V_DD = 3.3 V  0.3 V, T_amb = 40 C to +95 C; unless otherwise specified.
Symbol Parameter
Conditions
V_DD = 2.5 V
V_DD = 3.3 V Unit
Min
Max
Min
Max
I²C-bus inputs SCL, CS/A0, SI/A1
V_IH
HIGH-level input voltage
1.6
5.5^[1]
2.0
5.5^[1] V
V_IL
LOW-level input voltage
I_L
leakage current
input; V_I = 0 V or 5.5 V^[1]
-
0.6
-
0.8 V
-
10
-
10 A
C_i
input capacitance
Clock input XTAL1^[2]
-
7
-
7 pF
V_IH
HIGH-level input voltage
1.8
5.5^[1]
2.4
5.5^[1] V
V_IL
LOW-level input voltage
I_L
leakage current
input; V_I = 0 V or 5.5 V^[1]
-
0.45
-
0.6 V
30
+30
30
+30 A
C_i
input capacitance
-
3
-
3 pF
Sleep current
I_DD(sleep) sleep mode supply current inputs are at V_DD or ground
-
30
-
30 A
[1] 5.5 V steady state voltage tolerance on inputs and outputs is valid only when the supply voltage is present. 3.8 V steady state voltage
tolerance on inputs and outputs when no supply voltage is present.
[2] XTAL2 should be left open when XTAL1 is driven by an external clock.
SC16IS740_750_760
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 9 June 2011
© NXP B.V. 2011. All rights reserved.
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