PCA9665 Datasheet, PDF (41/90 Pages) NXP Semiconductors – Fm+ parallel bus to I2C-bus controller

NXP Semiconductors
PCA9665
Fm+ parallel bus to I²C-bus controller
If the LB bit is reset (logic 0), the PCA9665 will return an acknowledge for all the bytes that
will be received. The maximum number of bytes that are received in a single sequence is
defined by BC[6:0] in I2CCOUNT register as shown in Table 39.
If the LB bit is set (logic 1) during a transfer, the PCA9665 will return a not acknowledge
(logic 1) on SDA after receiving the last byte. If the AA bit is reset, the I²C-bus state
machine does not respond to its own slave address. However, the I²C-bus is still
monitored and address recognition may be resumed at any time by setting AA. This
means that the AA bit may be used to temporarily isolate the PCA9665 from the I²C-bus.
reception of
own slave address
and one or more
S
SLA
WA
DATA
data bytes;
all are Acknowledged
60h
last data byte received is
Not Acknowledged
arbitration lost as MST and
addressed as slave
A
68h
P or S
(4)
A DATA
A DATA
80h
(2)
A P or S
80h A0h
(2)
A P or S
88h F8h
(3) _{on STOP}
F8h _{on STOP}
(4)
reception of the
General Call address _S GENERAL _W
A
and one or more
CALL = 00h
data bytes
D0h
DATA
A DATA
last data byte received is
Not Acknowledged
arbitration lost as MST and
addressed as slave by
General Call
from master to slave
A
D8h
P or S
from slave to master
F8h on STOP
A DATA
E0h
(2)
A P or S
E0h A0h
(2)
A P or S
E8h F8h
(3) _{on STOP}
DATA
A ^{any number of data bytes and}
their associated Acknowledge bits
n
This number (contained in I2CSTA) corresponds
to a defined state of the I²C-bus.⁽¹⁾
002aab661
(1) See Table 40.
(2) Defined state when the number of bytes received is equal to the value in I2CCOUNT register and LB = 0.
(3) Defined state when the number of bytes received is equal to the value in I2CCOUNT register and LB = 1.
(4) Number of bytes received is lower than I2CCOUNT.
Fig 13. Format and states in the Slave Receiver Buffered mode (MODE = 1)
PCA9665_3
Product data sheet
Rev. 03 — 12 August 2008
© NXP B.V. 2008. All rights reserved.
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