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| PSMN4R0-30YL_09 Datasheet, PDF (4/14 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET | |||
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NXP Semiconductors
PSMN4R0-30YL
N-channel TrenchMOS logic level FET
103
ID
(A)
102
10
1
10-1
10-1
Limit RDSon = VDS / ID
1
DC
10
003aac650
10 μs
100 μs
1 ms
10 ms
100 ms
VDS (V)
102
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Thermal characteristics
Parameter
thermal resistance from junction to
mounting base
Conditions
see Figure 4
Min Typ Max Unit
-
1
1.82 K/W
10
Zth(j-mb)
(K/W)
δ = 0.5
1
0.2
0.1
0.05
10-1
0.02
003aac648
P
δ = tp
T
single shot
10-2
tp
t
T
10-6
10-5
10-4
10-3
10-2
10-1
tp (s)
1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration
PSMN4R0-30YL_3
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 â 31 December 2009
© NXP B.V. 2009. All rights reserved.
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