ADC1213D Datasheet, PDF (4/41 Pages) NXP Semiconductors – Dual 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps

NXP Semiconductors
ADC1213D series
ADC1213D series
Table 2. Pin description …continued
Symbol
Pin
Type ^[1]
INBM
13
I
INBP
14
I
VDDA
15
P
VDDA
16
P
SCLK/DCS
17
I
SDIO/DCS
18
I/O
CS
AGND
RESET
SCRAMBLER
CFG0
CFG1
CFG2
CFG3
VDDD
DGND
DGND
DGND
VDDD
CMLPB
CMLNB
VDDD
DGND
DGND
VDDD
CMLNA
CMLPA
VDDD
DGND
DGND
SYNCP
SYNCN
DGND
VDDD
SWING_0
SWING_1
DNC
VDDA
AGND
19
I
20
G
21
I
22
I
23
I/O
24
I/O
25
I/O
26
I/O
27
P
28
G
29
G
30
G
31
P
32
O
33
O
34
P
35
G
36
G
37
P
38
O
39
O
40
P
41
G
42
G
43
I
44
I
45
G
46
P
47
I
48
I
49
O
50
P
51
G
Description
channel B complementary analog input
channel B analog input
analog power supply 3 V
analog power supply 3 V
SPI clock
data format select
SPI data input/output
duty cycle stabilizer
chip select bar
analog ground
JEDEC digital IP reset
scrambler enable and disable
see Table 28 (input) or OTRA (output)^[2]
see Table 28 (input) or OTRB (output)^[2]
see Table 28 (input)
see Table 28 (input)
digital power supply 1.8 V
digital ground
digital ground
digital ground
digital power supply 1.8 V
channel B output
channel B complementary output
digital power supply 1.8 V
digital ground
digital ground
digital power supply 1.8 V
channel A complementary output
channel A output
digital power supply 1.8 V
digital ground
digital ground
synchronization from FPGA
synchronization from FPGA
digital ground
digital power supply 1.8 V
JESD204 serial buffer programmable output swing
JESD204 serial buffer programmable output swing
do not connect
analog power supply 3 V
analog ground
ADC1213D_SER_5
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 05 — 23 April 2010
© NXP B.V. 2010. All rights reserved.
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