DAC1008D750 Datasheet, PDF (36/99 Pages) NXP Semiconductors – Dual 10-bit DAC up to 750 Msps 2×, 4× or 8× interpolating with JESD204A interface

NXP Semiconductors
DAC1008D750
2×, 4× or 8× interpolating with JESD204A
Figure 24 is an example of a DC interface connected to an AQM with a common-mode
input level (V_i(cm)) of 1.7 V when using auxiliary DACs.
V_DDA(3V3)
AQM (V_i(cm) = 1.7 V)
(1)
IOUTnP
IOUTnN
51.1 Ω 51.1 Ω
0 mA to 20 mA
442 Ω
442 Ω
AUXnP
AUXnN
1.1 mA (typ.)
698 Ω
(2)
BBP
BBN
698 Ω
51.1 Ω 51.1 Ω
(1) _{IOUTnP/IOUTnN; Vo(cm) = 2.67 V; Vo(dif)(p-p) = 1.94 V}
(2) _{BBP/BBN; Vi(cm) = 1.7 V; Vi(dif)(p-p) = 1.23 V; offset correction up to 36 mV}
001aaj543
Fig 24. Example of a DC interface to an AQM with a V_i(cm) of 1.7 V when using auxiliary
DACs
Figure 25 is an example of a DC interface connected to an to an AQM with a
common-mode input level (V_i(cm)) of 3.3 V when using auxiliary DACs.
3.3 V
5V
AQM (V_i(cm) = 3.3 V)
(1)
IOUTnP
IOUTnN
AUXnP
AUXnN
54.9 Ω
54.9 Ω
237 Ω
237 Ω
634 Ω
634 Ω
750 Ω
750 Ω
(2)
BBP
BBN
442 Ω
442 Ω
DAC1008D750_1
Objective data sheet
(1) _{IOUTnP/IOUTnN; Vo(cm) = 2.75 V; Vo(dif)(p-p) = 1.96 V}
(2) _{BBP/BBN; Vi(cm) = 3.3 V; Vi(dif)(p-p) = 1.5 V; offset correction up to 36 mV}
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Fig 25. Example of a DC interface to an AQM with a V_i(cm) of 3.3 V when using auxiliary
DACs
The constraints to adjusting the interface are the output compliance range of the DAC and
the auxiliary DACs, the input common-mode level of the AQM, and the range of offset
correction.
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 4 October 2010
© NXP B.V. 2010. All rights reserved.
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