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UJA1075 Datasheet, PDF (32/53 Pages) NXP Semiconductors – High-speed CAN/LIN core system basis chip
NXP Semiconductors
UJA1075
High-speed CAN/LIN core system basis chip
9. Static characteristics
Table 10. Static characteristics
Tvj = −40 °C to +150 °C; VBAT = 4.5 V to 28 V; VBAT > VV1; VBAT > VV2; RLIN = 500 Ω; R(CANH-CANL) = 45 Ω to 65 Ω; all voltages
are defined with respect to ground; positive currents flow in the IC; typical values are given at VBAT = 14 V; unless otherwise
specified.
Symbol
Parameter
Conditions
Min Typ Max Unit
Supply; pin BAT
VBAT
IBAT
battery supply voltage
battery supply current
4.5 -
28
V
MC = 00 (Standby; V1 on, V2 off)
STBCC = STBCL = 1 (CAN/LIN
wake-up enabled)
WIC1 = WIC2 = 11 (WAKE interrupts
enabled); 7.5 V < VBAT < 28 V
IV1 = 0 mA; VRSTN = VSCSN = VV1
VTXDL = VTXDC = VV1; VSDI = VSCK = 0 V
Tvj = −40 °C
-
83
98
μA
Tvj = 25 °C
-
76
88
μA
Tvj = 150 °C
-
68
80
μA
MC = 01 (Sleep; V1 off, V2 off)
STBCC = STBCL = 1 (CAN/LIN
wake-up enabled)
WIC1 = WIC2 = 11 (WAKE interrupts
enabled)
7.5 V < VBAT < 28 V; VV1 = 0 V
Tvj = −40 °C
-
60
71
μA
Tvj = 25 °C
-
56
65
μA
Tvj = 150 °C
-
51
59
μA
contributed by LIN wake-up receiver
-
1.1 2
μA
STBCL = 1
VLIN = VBAT
5.5 V < VBAT < 28 V
contributed by CAN wake-up receiver
1
6
13
μA
STBCC = 1; VCANH = VCANL = 2.5 V
5.5 V < VBAT < 28 V
contributed by WAKEn pin edge
detectors
WIC1 = WIC2 = 11
VWAKE1 = VWAKE2 = VBAT
0
5
10
μA
UJA1075_2
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 27 May 2010
© NXP B.V. 2010. All rights reserved.
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