PIMZ2 Datasheet, PDF (3/9 Pages) NXP Semiconductors – NPN/PNP general-purpose double transistors

NXP Semiconductors
PIMZ2; PUMZ2
NPN/PNP general-purpose double transistors
5. Limiting values
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Per transistor; for the PNP transistor with negative polarity
V_CBO
V_CEO
V_EBO
I_C
I_CM
I_BM
P_tot
collector-base voltage
open emitter
-
collector-emitter voltage open base
-
emitter-base voltage
open collector
-
collector current (DC)
-
peak collector current
-
peak base current
-
total power dissipation
T_amb ≤ 25 °C
SOT457
[1] _-
SOT363
[1] _-
T_stg
storage temperature
−65
T_j
junction temperature
-
T_amb
ambient temperature
−65
Per device
P_tot
total power dissipation
T_amb ≤ 25 °C
SOT457
[1] _-
SOT363
[1] _-
[1] Device mounted on an FR4 printed-circuit board.
Max
60
50
7
150
200
100
200
180
+150
150
+150
300
300
Unit
V
V
V
mA
mA
mA
mW
mW
°C
°C
°C
mW
mW
6. Thermal characteristics
Table 7. Thermal characteristics
Symbol Parameter
Per transistor
R_th(j-a)
thermal resistance from
junction to ambient
SOT457
SOT363
Per device
R_th(j-a)
thermal resistance from
junction to ambient
SOT457
SOT363
Conditions
T_amb ≤ 25 °C
T_amb ≤ 25 °C
[1] Device mounted on an FR4 printed-circuit board.
Min Typ Max Unit
[1] _-
-
625 K/W
[1] _-
-
694 K/W
[1] _-
-
417 K/W
[1] _-
-
417 K/W
PIMZ2_PUMZ2_6
Product data sheet
Rev. 06 — 17 November 2009
© NXP B.V. 2009. All rights reserved.
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