PH3330L Datasheet, PDF (3/13 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET

NXP Semiconductors
120
I_der
(%)
80
03aa23
PH3330L
N-channel TrenchMOS logic level FET
120
P_der
(%)
80
03aa15
40
40
0
0
50
100
150
200
T_mb (°C)
0
0
50
100
150
200
T_mb (°C)
Fig 1. Normalized continuous drain current as a
function of mounting base temperature
10³
I_D
(A)
10²
Limit R_DSon = V_DS / I_D
10
1
10^-1
1
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
003aab259
t_p = 10 μ s
100 μs
1 ms
DC
10 ms
100 ms
10
10²
V_DS (V)
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PH3330L_2
Product data sheet
Rev. 02 — 22 October 2008
© NXP B.V. 2008. All rights reserved.
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