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PH3330L Datasheet, PDF (1/13 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET
PH3330L
N-channel TrenchMOS logic level FET
Rev. 02 — 22 October 2008
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
1.2 Features and benefits
„ High efficiency due to low switching
and conduction losses
„ Suitable for logic level gate drive
sources
1.3 Applications
„ DC-to-DC converters
„ Notebook computers
„ Switched-mode power supplies
„ Voltage regulators
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
Conditions
VDS
drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C
ID
drain current
Tmb = 25 °C; VGS = 10 V;
see Figure 1; see Figure 3
Ptot
total power
dissipation
Tmb = 25 °C; see Figure 2
Dynamic characteristics
QGD
gate-drain charge VGS = 4.5 V; ID = 25 A;
VDS = 12 V; see Figure 12;
see Figure 13
Static characteristics
RDSon
drain-source
on-state resistance
VGS = 10 V; ID = 25 A;
Tj = 25 °C; see Figure 10;
see Figure 11
Min Typ Max Unit
-
-
30 V
-
-
100 A
-
-
62.5 W
-
6.9 -
nC
-
2.3 3.3 mΩ