GTL2002 Datasheet, PDF (3/22 Pages) NXP Semiconductors – 2-bit bi-directional low voltage translator

NXP Semiconductors
5. Functional diagram
GTL2002
2-bit bidirectional low voltage translator
DREF GREF D1
D2
SREF
Fig 1. Functional diagram
S1
S2
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6. Pinning information
6.1 Pinning
GND 1
SREF 2
S1 3
S2 4
8 GREF
7 DREF
GTL2002D
6 D1
5 D2
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Fig 2. Pin configuration for SO8
SREF 1
S1 2
S2 3
GND 4
GTL2002DC
8 GREF
7 DREF
6 D1
5 D2
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Fig 4. Pin configuration for VSSOP8
GTL2002DP
GTL2002DP/Q900
GND 1
SREF 2
S1 3
S2 4
8 GREF
7 DREF
6 D1
5 D2
002aac778
Fig 3. Pin configuration for TSSOP8
(MSOP8)
terminal 1
index area
GND 1
7 DREF
GTL2002GM
SREF 2
6 D1
S1 3
5 D2
002aac780
Transparent top view
Fig 5. Pin configuration for XQFN8U
GTL2002_7
Product data sheet
Rev. 07 — 2 July 2009
© NXP B.V. 2009. All rights reserved.
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