PCF8533 Datasheet, PDF (28/45 Pages) NXP Semiconductors – Universal LCD driver for low multiplex rates

NXP Semiconductors
PCF8533
Universal LCD driver for low multiplex rates
20
I_DD(LCD)
(μA)
16
001aal524
12
8
4
0
3
5
7
9
V_LCD (V)
T_amb = 30 °C; 1:4 multiplex; f_clk(ext) = 1.536 kHz; all RAM written with logic 1; no display connected.
Fig 19. Typical I_DD(LCD) with respect to V_LCD
12. Dynamic characteristics
Table 17. Dynamic characteristics
V_DD = 1.8 V to 5.5 V; V_SS = 0 V; V_LCD = 2.5 V to 6.5 V; T_amb = −40 °C to +85 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min Typ Max
Clock
f_clk(int)
internal clock frequency
f_clk(ext)
external clock frequency
t_clk(H)
HIGH-level clock time
t_clk(L)
LOW-level clock time
t_r
rise time
t_f
fall time
Synchronization: input pin SYNC
[1][3] ₉₆₀
[1][3] ₇₉₇
130
130
-
-
1 536
1 536
-
-
-
-
3 046
3 046
-
-
-
-
t_{PD(SYNC_N)} SYNC propagation delay
t_{SYNC_NL}
SYNC LOW time
Outputs: pins BP0 to BP3 and S0 to S79
-
30
-
1
-
-
t_PD(drv)
driver propagation delay
I²C-bus: timing^[2]; see Figure 21
V_LCD = 5 V
-
-
30
Pin SCL
f_SCL
t_LOW
t_HIGH
Pin SDA
SCL clock frequency
LOW period of the SCL clock
HIGH period of the SCL clock
-
-
400
1.3
-
-
0.6 -
-
t_SU;DAT
t_HD;DAT
data set-up time
data hold time
100 -
-
0
-
-
Unit
Hz
Hz
μs
μs
ns
ns
ns
μs
μs
kHz
μs
μs
ns
ns
PCF8533_4
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 04 — 5 March 2010
© NXP B.V. 2010. All rights reserved.
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