LPC11C12 Datasheet, PDF (27/49 Pages) NXP Semiconductors – 32-bit ARM Cortex-M0 microcontroller; 16/32 kB flash, 8 kB SRAM; C_CAN

NXP Semiconductors
9.1 BOD static characteristics
Table 7. BOD static characteristics^[1]
T_amb = 25 °C.
Symbol Parameter
Conditions
V_th
threshold voltage interrupt level 0
assertion
de-assertion
interrupt level 1
assertion
de-assertion
interrupt level 2
assertion
de-assertion
interrupt level 3
assertion
de-assertion
reset level 0
assertion
de-assertion
reset level 1
assertion
de-assertion
reset level 2
assertion
de-assertion
reset level 3
assertion
de-assertion
Min
-
LPC11C12/C14 ^DRAFT_1Ty.^D_{6pR5ADFRTADFTRADFRT-M}^DADFR_{aTRAxAFDTFRTADDFRVUTRDAnARFDiTFARtTFADTDFRTRDAARDFTFDARTRFADTADFRTFRDATADRF}
-
1.80
-
V
-
2.22
-
V
-
2.35
-
V
-
2.52
-
V
-
2.66
-
V
-
2.80
-
V
-
2.90
-
V
-
1.46
-
V
-
1.63
-
V
-
2.06
-
V
-
2.15
-
V
-
2.35
-
V
-
2.43
-
V
-
2.63
-
V
-
2.71
-
V
[1] Interrupt levels are selected by writing the level value to the BOD control register BODCTRL, see LPC11Cx
user manual.
9.2 Power consumption
Power measurements in Active, Sleep, and Deep-sleep modes were performed under the
following conditions (see LPC11Cx user manual):
• Configure all pins as GPIO with pull-up resistor disabled in the IOCONFIG block.
• Configure GPIO pins as outputs using the GPIOnDIR registers.
• Write 0 to all GPIOnDATA registers to drive the outputs LOW.
LPC11C12_C14_0
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 00.05 — 6 May 2010
© NXP B.V. 2010. All rights reserved.
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