74LVC2T45 Datasheet, PDF (24/32 Pages) NXP Semiconductors – Dual supply translating transceiver; 3-state

NXP Semiconductors
74LVC2T45; 74LVCH2T45
Dual supply translating transceiver; 3-state
V_CC1
I/O-1
DIR CTRL
V_CC1
PULL-UP/DOWN
V_CC(A)
1
V_CC(B)
8
1A
1B
2 _74LVC2T45 7
2A _{3 74LVCH2T45 6} 2B
GND ₄
5 ^DIR
V_CC2
PULL-UP/DOWN
V_CC2
I/O-2
DIR CTRL
system-1
Pull-up or pull-down only needed for 74LVC2T45.
Fig 17. Bidirectional logic level-shifting application
system-2
001aai932
Table 17 gives a sequence that will illustrate data transmission from system-1 to system-2
and then from system-2 to system-1.
Table 17. Description of bidirectional logic level-shifting application^[1]
State DIR CTRL I/O-1
I/O-2
Description
1
H
output
input
system-1 data to system-2
2
H
Z
Z
system-2 is getting ready to send data to system-1. I/O-1 and I/O-2
are disabled. The bus-line state depends on bus hold
3
L
Z
Z
DIR bit is set LOW. I/O-1 and I/O-2 still are disabled. The bus-line
state depends on bus hold
4
L
input
output
system-2 data to system-1
[1] H = HIGH voltage level;
L = LOW voltage level;
Z = high-impedance OFF-state.
14.3 Power-up considerations
The device is designed such that no special power-up sequence is required other than
GND being applied first.
Table 18.
V_CC(A)
0V
1.8 V
2.5 V
3.3 V
5.0 V
Typical total supply current (I_CC(A) + I_CC(B))
V_CC(B)
0V
1.8 V
2.5 V
0
<1
<1
<1
<2
<2
<1
<2
<2
<1
<2
<2
<1
2
<2
3.3 V
<1
<2
<2
<2
<2
5.0 V
<1
2
<2
<2
<2
Unit
μA
μA
μA
μA
μA
74LVC_LVCH2T45_3
Product data sheet
Rev. 03 — 19 January 2010
© NXP B.V. 2010. All rights reserved.
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