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| SSTUB32868 Datasheet, PDF (20/30 Pages) NXP Semiconductors – 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications | |||
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NXP Semiconductors
SSTUB32868
1.8 V DDR2-800 configurable registered buffer with parity
input
CK
CK
tsu
Vref
VICR
th
VID
VIH
Vref
VIL
002aaa374
VID = 600 mV.
Vref = 0.5VDD.
VIH = Vref + 250 mV (AC voltage levels) for differential inputs. VIH = VDD for LVCMOS inputs.
VIL = Vref â 250 mV (AC voltage levels) for differential inputs. VIL = GND for LVCMOS inputs.
Fig 12. Voltage waveforms; setup and hold times
CK
VICR
CK
tPLH
output
VICR
tPHL
VT
Vi(p-p)
VOH
VOL
002aaa375
tPLH and tPHL are the same as tPD.
Fig 13. Voltage waveforms; propagation delay times (clock to output)
LVCMOS
RESET
output
VIH
0.5VDD
VIL
tPHL
VOH
VT
VOL
002aaa376
tPLH and tPHL are the same as tPD.
VIH = Vref + 250 mV (AC voltage levels) for differential inputs. VIH = VDD for LVCMOS inputs.
VIL = Vref â 250 mV (AC voltage levels) for differential inputs. VIL = GND for LVCMOS inputs.
Fig 14. Voltage waveforms; propagation delay times (reset to output)
SSTUB32868_4
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 04 â 22 April 2010
© NXP B.V. 2010. All rights reserved.
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