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PSMN2R5-30YL_11 Datasheet, PDF (2/14 Pages) NXP Semiconductors – N-channel 30 V 2.4 mΩ logic level MOSFET in LFPAK
NXP Semiconductors
PSMN2R5-30YL
N-channel 30 V 2.4 mΩ logic level MOSFET in LFPAK
2. Pinning information
Table 2.
Pin
1
2
3
4
mb
Pinning information
Symbol Description
S
source
S
source
S
source
G
gate
D
mounting base; connected to
drain
Simplified outline
mb
1234
SOT669 (LFPAK)
3. Ordering information
Graphic symbol
D
G
mbb076 S
Table 3. Ordering information
Type number
Package
Name
PSMN2R5-30YL
LFPAK
4. Limiting values
Description
Version
plastic single-ended surface-mounted package (LFPAK); 4 leads SOT669
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
VDSM
VDGR
VGS
ID
IDM
Parameter
drain-source voltage
peak drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
Conditions
Tj ≥ 25 °C; Tj ≤ 175 °C
tp ≤ 25 ns; f ≤ 500 kHz;
EDS(AL) ≤ 240 nJ; pulsed
Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ
VGS = 10 V; Tmb = 100 °C; see Figure 1
VGS = 10 V; Tmb = 25 °C; see Figure 1
pulsed; tp ≤ 10 µs; Tmb = 25 °C;
see Figure 3
Ptot
total power dissipation
Tstg
storage temperature
Tj
junction temperature
Source-drain diode
Tmb = 25 °C; see Figure 2
IS
source current
ISM
peak source current
Avalanche ruggedness
Tmb = 25 °C
pulsed; tp ≤ 10 µs; Tmb = 25 °C
EDS(AL)S
non-repetitive drain-source
avalanche energy
VGS = 10 V; Tj(init) = 25 °C; ID = 100 A;
Vsup ≤ 30 V; RGS = 50 Ω; unclamped
[1] Continuous current is limited by package.
Min Max Unit
-
30 V
-
35 V
-
-20
[1] -
[1] -
-
30 V
20 V
100 A
100 A
580 A
-
88 W
-55 175 °C
-55 175 °C
[1] -
100 A
-
580 A
-
103 mJ
PSMN2R5-30YL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 04 — 10 March 2011
© NXP B.V. 2011. All rights reserved.
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