PCF2123_11 Datasheet, PDF (18/63 Pages) NXP Semiconductors – SPI Real time clock/calendar Time keeping application

NXP Semiconductors
PCF2123
SPI Real time clock/calendar
8.5.4 Register Weekday_alarm
Table 21. Weekday_alarm - weekday alarm register (address 0Ch) bit description
Bit
Symbol
Value
Description
7
AE_W
0
weekday alarm is enabled
1^[1]
weekday alarm is disabled
6 to 3 -
-
unused
2 to 0 WEEKDAY_ALARM 0 to 6
weekday alarm information coded in BCD
format
[1] Default value.
8.5.5 Alarm flag
By clearing the MSB, AE_x (Alarm Enable), of one or more of the alarm registers the
corresponding alarm condition(s) are active. When an alarm occurs, AF (register
Control_2, see Table 7) is set logic 1. The asserted AF can be used to generate an
interrupt (INT). The AF is cleared using the interface.
check now signal
MINUTE ALARM
=
MINUTE TIME
HOUR ALARM
=
HOUR TIME
DAY ALARM
=
DAY TIME
AE_M
AE_H
AE_D
example
AE_M = 1
1
0
set alarm flag AF ⁽¹⁾
WEEKDAY ALARM
=
WEEKDAY TIME
AE_W
013aaa088
(1) Only when all enabled alarm settings are matching.
It’s only on increment to a matched case that the alarm flag is set, see Section 8.5.5.
Fig 12. Alarm function block diagram
The registers at addresses 09h through 0Ch contain alarm information. When one or
more of these registers is loaded with minute, hour, day, or weekday, and its
corresponding Alarm Enable bit (AE_x) is logic 0, then that information is compared with
the current minute, hour, day, and weekday. When all enabled comparisons first match,
the Alarm Flag (AF) is set logic 1.
PCF2123
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 27 April 2011
© NXP B.V. 2011. All rights reserved.
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