PCF8534A_08 Datasheet, PDF (16/44 Pages) NXP Semiconductors – Universal LCD driver for low multiplex rates

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drive mode
LCD segments
LCD backplanes
display RAM filling order
static
1:2
multiplex
1:3
multiplex
S_n+2
S_n+3
S_n+4
S_n+5
S_n+6
a
f
g
b
S_n+1
S_n
e
c ^Sn+7
d
DP
BP0
S_n
a
b
S_n+1 f
g
S_n+2 e
c
S_n+3
d
BP0
DP
S_n+1
a
S_n+2 f
b
g
e
c
d
S_n
DP
BP0
BP1
1:4
multiplex
S_n
a
b
f
g
e
c
S_n+1
d
BP0
BP1
DP
n n1 n2 n3 n4 n5 n6 n7
bit/ 0 c b
a
f
g
e
d
DP
BP _{1 x x}
x
x
x
x
x
x
2x x
x
x
x
x
x
x
3x x
x
x
x
x
x
x
n n1 n2 n3
bit/ 0 a f
e
d
BP _{1 b g}
c
DP
BP1
2x x
x
x
3x x
x
x
n n1 n2
bit/ 0 b a
f
BP _{1 DP d}
e
BP2
2c g
x
3x x
x
BP2
BP3
n n1
bit/ 0 a f
BP _{1 c e}
2b g
3 DP d
transmitted display byte
MSB
LSB
c b a f g e d DP
MSB
LSB
a b f g e c d DP
MSB
LSB
b DP c a d g f e
MSB
LSB
a c b DP f e g d
mgl751
x = data bit unchanged.
Fig 11. Relationship between LCD layout, drive mode, display RAM storage order and display data transmitted over the I²C-bus